Job Title: C++ Engineer - LabVIEW & VHDL/Verilog
Location: Crane, IN (On-site or willing to relocate)
Security Clearance: Active Security Clearance required
Job Summary:
We are seeking a highly motivated C++ Engineer with a strong foundation in LabVIEW and VHDL/Verilog to support mission-critical projects for our defense clients. This position requires an individual with an active U.S. security clearance and the ability to work on-site at our Crane, Indiana facility or relocate accordingly.
Key Responsibilities:
- Design, develop, and maintain C++ applications for hardware-in-the-loop (HIL) systems, simulation environments, and embedded platforms.
- Integrate LabVIEW-based instrumentation and test solutions with existing systems.
- Collaborate on FPGA/ASIC design and verification using VHDL or Verilog.
- Work closely with cross-functional teams including electrical, systems, and test engineers to develop robust and reliable software.
- Troubleshoot, optimize, and enhance system-level performance.
- Ensure compliance with defense security requirements and project timelines.
Required Qualifications:
- U.S. Citizen with Active Security Clearance (DoD Secret or higher).
- Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or related field.
- 3+ years of professional experience in C++ development.
- Hands-on experience with LabVIEW and FPGA design using VHDL/Verilog.
- Strong understanding of embedded systems, hardware-software integration, and real-time processing.
- Ability to interpret and contribute to system-level requirements and documentation.
Preferred Qualifications:
- Experience in defense or government contracting environment.
- Familiarity with NI hardware platforms and tools (PXI, CompactRIO).
- Knowledge of hardware simulation tools and version control (e.g., Git, SVN).
- Excellent problem-solving skills and attention to detail.
